ELE306: Electronic Design Automation Laboratory

Spring 2008 Laboratory Schedule

Kelley 220, Computer Engineering Laboratory

• Lab 1: Schematic Entry (1 week)


• Lab 2: Hierarchical VHDL Designs (2 weeks)


• Lab 3: VGA and PS/2 -- Reusing existing VHDL modules (2 weeks)


• Lab 4: RTL Viewer, etc. (1 week)


• Lab 5: Algorithmic State Machines and Video RAM(2 weeks)


• Lab 6: Serial Communication (1 week; exercises only)


• Project: A Classic Video Game (3 weeks)