University HomeUniversity DirectoriesUniversity Fast LinksDepartment Site MapDepartment HelpDepartment Webmail Server

 

Department Home

Schedule and Grading Policy
Laboratory Manuals
Semester project
Exams
Homework
Class hand-outs
some useful links

 

 



ELE405: Digital Computer Design

Fall  2007


ELE405 Digital Computer Design (4)
Hardware implementation of digital computers. Arithmetic circuits, memory types and uses, control logic, basic computer organization, microprogramming, input/output circuits, microcomputers.
(Lec. 3, Lab. 3) Pre: ELE 305 and 306.

 


Course Description: After completing this course, you should understand how a computer system is built and how it operates from the viewpoints of the computer architect, the assembly language programmer, and the logic designer. You will learn how to design the internal components of a processor, including the datapath and control unit, the arithmetic logic unit, and the memory system. You also will develop an understanding of the performance and implementation trade-offs inherent in any computer design.

Laboratory:
The main software tool for this class is the Altera’s Quartus II. This is a comprehensive package includes schematic editor, state diagram editor, VHDL entry and synthesis tool, integrated waveform and timing simulator, DSP design tools and utilities, and FPGA implementation and configuration. There will be four scheduled laboratories to practice some advanced topics in VHDL and CPU designs.

Project:
Information about the project can be found here. Student will first design and implement their CPUs from scratch. At the second stage of the project, larger teams will be formed to build prototypes of computer-based systems using these new CPUs.


 

 

 

The main hardware facility is the UP-2 board from Altera. It carries a Altera's Flex10K EPF10K70 FPGA (5.0V/3.3V/2.5V, 70K equivalent logic gates, 200MHz, in a 240-pin RQFP). The FPGA configuration file is downloaded from the host computer via a special parallel cable: ByteBlaster II.

 


Time & Location: 

Lectures:
MWF 12:00-12:50 pm, Kelley 102.
Labs:
M 2:00pm - 4:45pm, , Kelley 220.


Instructor:
Dr. Resit Sendag
- Office: Kelley 211
- Phone: x4-9423
- Email: sendag@ele.uri.edu
- Office Hours: MW 1-2pm

Teaching Assistant:
Ian Sabo
- E-mail:saboi@ele.uri.edu
- Office:  TBA
- Phone: TBA
- Office hours: TBA 


Required Texts:
1. "Computer Systems Design and Architecture," V. P. Heuring and H. F. Jordan, 2nd Edition, Prentice Hall, 2004. ISBN: 0-13-048440-7.

 

2. "The Designer's Guide to VHDL," Peter J. Ashenden, 2nd edition, Morgan Kaufmann Publishers, 2002. ISBN: 1-55860-674-2.

 

Supplemental Texts:

3. "Computer Organization and Design: The Hardware/Software Interface," D. Patterson and J. Hennessy, 2nd Edition, Morgan Kaufmann Publishers, 1997. ISBN: 1-55860-428-6.

 

4. "Rapid Prototyping of Digital Systems," J. O. Hamblen and M. D. Furman, 2nd Edition, Kluwer Academic Pub., 2001. ISBN: 0-7923-7439-8. (available in Computer Engineering Lab)

We will be using the Heuring and Jordan and the Ashenden books in this class. The Patterson and Hennessy book is optional and is intended as another computer architecture reference.1.



University Home

ŠUniversity of
Rhode Island
Disclaimer