Gates:

	inv_50.mag		inverter 
	nand_50.mag		2 input Nand gate
	nor_50.mag		2 input Nor gate
	and_50.mag		2 input And gate
	or_50.mag		2 input Or gate
	xor_50.mag		Exclusive Or gate
	xnor_50.mag		Exclusive Nor gate
	tgate_50.mag		Transmission Gate
	pass_50.mag		Pass Transistor Switch

Buffers:

	tri_buffer_50.mag	Tristate Buffer
	tri_inv_50.mag		Tristate Inverter

Multiplexers:

	mux2to1_50.mag		2:1 Multiplexer
	mux4to1_50.mag		4:1 Multiplexer

Decoders:
	
	dec2to4_50.mag		2:4  Decoder
	dec3to8_50.mag		3:8  Decoder
	dec4to16_50.mag		4:16 Decoder

static Latch:

       slatch1_50.mag		static latch

static Flip-Flops:

       sdff2_50.mag		Static dff

dynamic Latch:

	dlatch_50.mag		Static Latch (Pos Phase)

dynamic Flip-Flops:

	dff1_50.mag		dff with muxed input
	dff2_50.mag		dff 

1-bit Adders:

	fadder_50.mag		Binary Full Adder