ELE536 Semiconductor Electronics

Summer 97


TR 7:45am Class room 1 Cherry Semiconductor

536 Bipolar Integrated Circuit Design (II, 3) Design and testing of bipolar integrated circuits. Current sources, process variations & circuit performance, voltage references, temperature compensation, comparators, op amps, I2L logic. Student chip designs are fabricated and tested. (lec. 2, Lab. 3) Pre: Ele342 or equivalent

This is a course in bipolar analog electronics.

Design engineers from Cherry Semiconductor give guest lectures. Cherry fabricates the student designs.

This course can be used to satisfy the design requirement.

Instructor: J. C. Daly


Click on photo to reduce.

Front row, Todd Sherman, Prof. Daly, Vic Desireddi, Jennifer Allegretto, Corbet Johnson, Alfred Binder
Back Row, Paul Ferrara(Guest Lecturer), Andrew Mackinnon, Roy Wotring, Scott Wagner, Jim Papa, David Levy, Chris Lesher, Kieran O'Malley, Nadia Matchey, Eric Willis, Denis Galipeau, Larisa Almeida, Scott Jorek, Eric Lindberg, Igor Yankov, Justin Yerger, Andrew Talan, John Guravage, John Ferrara, Shelby Raymond, Mike Lerch(Program Director)
Not shown, Narayan Raja, Daniel Connolly, Edward Harris

No Class Tuesday Aug 12

The class will take a tour of the fab instead. Check out the Tour Schedule.

  • Plotting your layout
  • Presentation Schedule
  • Reports.
  • Tour Schedule
  • Layout User Accounts
  • Using IC Station
  • Bipolar Shrink home page
  • Bipolar Shrink 14 Volt process
    On the following 39 pages, the 14 Volt Bipolar Phase I process is presented, step by step, along with cross sectional drawing of the primary devices. You can view the process as it is being built, step by step, and watch the NPN's and PNP's being built.
  • Bipolar Process Pictures
    Microscope Images are Displayed of the Bipolar Process being built Step-by-Step.
  • Projects, Groups, and Mentors
  • Old Exam Problems
  • Old Projects to be Tested by this summers class.
  • Running SmartSpice from X Terminals
  • Homework
  • Syllabus
  • SmartSpice Starter Tutorial
  • SPICE Models
  • Design failure modes
  • Fall 96 Class
  • Get your own copy of PSpice from Microsim
    Limited to 10 transistors, but its free.
  • A better source for SPICE info
  • Mail can be sent to

  • daly@ele.uri.edu
  • jcd@cherry-semi.com