ELE545 Design of Digital Circuits

MW 4:00 - 6:00 PM, Cherry Semiconductor, East Greenwich

Instructor: Dr. Jien-Chung Lo, Office: K-211, Tel: (401) 874-2996, FAX: (401) 782-6422

Office hours: MW 1-3 PM, Email: jcl@ele.uri.edu

In this course students study advanced and recent topics on digital circuits. Starting from Quinn-McCluskey method, we will venture into area far beyond the basic logic designs. Students will learn about complex Boolean function manipulations, desgining strategies and automation algorithms. We will deal with both combinational and sequential circuit. We will study both designing and testing aspect of digital logic circuits. Finally, we will examine how a digital VLSI cell library is designed.

Text Book: M. J. S. Smith, Application Specified Integrated Circuits, Addison-Wesley, 1997.

Supplemental materials will be handed out in class.

Syllabus & Schedule '00


1 1/19 Numbers, codes, and switching algebra
2 1/24, 1/26 Quinn-McCluskey method
3 1/31, 2/2 Combinational circuit analysis
4 2/7, 2/9 Combinational circuits design
5 2/14, 2/16 Boolean difference
6 2/23 Analysis of sequential circuits
7 2/28, 3/1 Sequential circuits design
8 3/6, 3/8 review + Mid-term examination
9 3/13, 3/15 Arithmetic Circuits
10 3/20, 3/22 VHDL and System Design
11 3/27, 3/29 FPGA and CPLD
12 4/3, 4/5 Digital Testing
13 4/10, 4/12 Design for testability
14 4/17, 4/19 CMOS digital circuits
15 4/24, 4/26 Digital VLSI Cell Library Design
16 5/1
5/3		 Mini-Project Presentation
Final Examination

Grading policy: Homeworks 20%, Mid-Term 25%, Mini-project+Presentation 20%, Final 35%

Disclaimer: The syllabus and schedule above are tentitive. They are for reference only.

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