Fourth Annual Boston Area Architecture Workshop
Keypanel Session



Description:

The Keypanel Session combines the best features of keynote speeches and panel sessions.
The end user, industry, and academic communities will each be represented by one keypanelist.
Three 15-minute keypanelist presentations will be followed by one 15-minute audience Q & A session.


General Topic: Whence goeth the microprocessor?

Specific questions to each keypanelist representative:
* to End Users: What does the commercial user want today? In 5 years? In 10 years?
* to Industry: What will/should industry provide today? In 5 years? In 10 years?
* to Academia: What will/should academia be looking at today? In 5 years? In 10 years?



The Keypanelists:
We are extremely fortunate to have the following practitioners and researchers representing:

* End Users: Dr. Atul Chhabra, Verizon Corp., Enterprise Architect and Senior IT Manager.
* Industry: Dr. Joel Emer, Intel Corp., Intel Fellow.
* Academia: Prof. Anant Agarwal, MIT, Professor of Electrical Engineering and Computer Science.



Keypanelist Biographies:

* Dr. Atul Chhabra
Dr. Chhabra is Enterprise Architect and Senior IT Manager at Verizon Communications Corp., a Fortune 14 company with over 200,000 employees and local, national and international communications responsibilities. He received his Ph.D. from the University of Cincinnati in 1990, and his B.Tech., Indian Institute of Technology, New Delhi, India in 1984. Dr. Chhabra has over fifteen years of IT, product development, e-business, and R&D experience at Verizon and its former companies. He has developed and managed the architecture for enterprise content management systems, enterprise portals as personalized employee desktops, integration of enterprise resource planning systems, and systems for managing internal controls. He has performed capacity planning, performance modeling, and evaluation of several enterprise systems. In the mid to late 90ís, Dr. Chhabra led Verizonís research into automated recognition and interpretation of scanned images of engineering drawings and benchmarking of the available methods. At the same time, he managed the process of scanning about half a million network drawings and the automated extraction of key information from the drawings.

* Dr. Joel Emer
Dr. Emer is an Intel Fellow, Digital Enterprise Group, and Director of Microarchitecture Research. Dr. Emer received his bachelorís and masterís degrees in electrical engineering from Purdue University in 1974 and 1975, respectively. He earned a doctorate in electrical engineering from the University of Illinois in 1979. Dr. Emer has worked in industry for over 25 years, spending much of his career at Digital Equipment Corp. (DEC), and then Compaq, where he was Director of Alpha Architecture Research. He was responsible for innovations in almost every aspect of micro-architecture for several generations of Alpha processors, widely considered to be the highest-performing processors of their time. As part of this work and in his earlier work on several generations of VAXes, Dr. Emer stressed the then-unusual quantitative approach to performance analysis. In recent years he was a pioneer in the research and implementation of simultaneous multithreading in a commercial processor. Dr. Emer is both an IEEE Fellow and an ACM Fellow.

* Prof. Anant Agarwal
Prof. Agarwal is a member of the EECS department at MIT, and is also a member of MITís Computer Science and Artificial Intelligence Laboratory (CSAIL). Anant Agarwal earned a Ph.D. in 1987 and an MS in Electrical Engineering both from Stanford University. He got his bachelor's degree in Electrical Engineering from IIT Madras in 1982. His teaching and research interests include VLSI, computer architecture, compilation, and software systems. He is the CTO and founder of Tilera Corp., the nth startup company of his career. Prof. Agarwal has led many well-known prototyped radically-novel architecture projects, including Alewife, VirtualWires and the current RAW machine project.