URI ECE ELE548

ELE548: Computer Architecture
Fall 2008

Course Description: The goal of this course is to impart a deep understanding of high-performance computer system architecture. The emphasis is on pipelining, instruction level parallelism, memory hierarchy, storage systems, interconnection networks, and multi-processor design. Topics covered include branch prediction techniques, dynamic instruction scheduling, cache memory, main memory, virtual memory, I/O systems, buses, multistage interconnection networks, memory consistency models, synchronization, and cache coherence protocols. Term project aims to develop an understanding of the techniques for quantitative analysis and evaluation of modern computing systems, such as the selection of appropriate benchmarks to reveal and compare the performance of alternative design choices in system design. The course is intended for graduate students in electrical and computer engineering, and computer science.

Time & Location:
5:00pm - 6:45pm, Mondays and Wednesdays @ Kelley 203.

Credits: 4

Prerequisites:
ELE 305 (Introduction to Computer Architecture) or ELE 405 (Digital Computer Design) or equivalent, or permission of instructor

Instructor:
Resit Sendag
- Office: A 219
- Phone: x4-9423
- Email: sendag@ele.uri.edu
- Office Hours: Mon Wed 12:00 – 1:00pm.

Required Text:

Computer Architecture: A Quantitative Approach (4^th Edition), John Hennessy and David Patterson, Morgan Kaufmann Publishers, 2007.

Supplemental Text:

Modern Processor Design: Fundamentals of Superscalar Processors, John Shen and Mikko Lipasti, McGraw-Hill, 2003.

Both of these books are available at the bookstore in Memorial Union and through Amazon.com: Hennessy and Patterson; Shen and Lipasti.