Title:   Techniques for the Generation of Highly Efficient Weighted
         Random Pattern Tests
Authors: *Paul Chang, Intel Corp., Austin, TX
Contact: paul.h.chang@intel.com

Abstract:
Weighted Random Pattern Tests (WRPT) are being used heavily in large chip
design due to the benefit of using significantly less tester memory
compared to deterministic tests. However, the inherent nature of WRPT
requires more tester cycles be applied to the product in order to achieve
equivalent fault coverage. Thus, it is critical that WRPT tests be as
efficient as possible in order to minimize the cost of their application.
This paper describes ways to improve the efficiency of current WRPT through
techniques of test sequence enhancement, focused weight, minimum simulation
and reverse weight simulation. The results show that dramatic reduction in
tester cycles are achieved. This translates into significant savings for
manufacturing due to the reduction in tester time.