2.2 - Flush Testing of Pipeline Partial Scan Structures - An Industrial
       Experiment

Authors: Xinghao Chen, Tom Snethen, Joe Swenton, Ron Walther
Univ/Comp: IBM
Presenter: Xinghao Chen - xinghaoc@vnet.ibm.com

******** Abstract:
In this paper we describe a simple test generation method for a
high-performance, pipelined, partial-scan microprocessor design
using an automatic test generation tool which was optimized for
combinational logic in generating manufacturing test data.
Without this test generation method the test generation tool
would have had great difficulty in generating the test data needed to
achieve the high fault coverage that was required.
User-specified clocking sequences are also allowed for design
flexibility. A description of this method is provided and the
experimental results are discussed.