4.4 - An Observability Register Architecture for Efficient Production
      Test and Debug

Authors: Dilip Bhavsar and Rishan Tan
Univ/Comp: Compaq Computer Corp.
Presenter: Rishan Tan - Rishan.Tan@compaq.com

******** Abstract:
Observability Registers based on Linear Feedback Shift Register have
been used to gain access to an integrated circuit's internal nodes for
testing. This paper presents a scheme that allows cost-effectively to
scatter such registers on a large IC. It addresses the issues of efficiency
during production test. It also provides the speed and convenience during
pattern debug, including trouble shooting errors caused by race and
non-initialized network nodes.