QING (KEN) YANG 杨庆
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Tel: (401) 874-5880 Fax: (401) 782-6422 TITLE |
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Distinguished Engineering Professor, Department of Electrical, Computer, and Biomedical
Engineering, University of Rhode
Island |
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EXPERIENCES |
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1997–Present Professor
Dept. of
ECE, University of Rhode
Island Kingston, RI 1993–1997 Associate Professor Dept. of
ECE, University of Rhode Island Kingston, RI 1988–1993 Assistant Professor
Dept. of ECE, University of Rhode
Island Kingston, RI |
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EDUCATION |
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Ph.D. with
honor, Computer Engineering, The Center for Advanced Computer
Studies, University of Louisiana, Lafayette, USA,
June 1988. Dissertation
Title: Analysis of Cache-based Multiple-bus Multiprocessors. M.A.Sc., Dept. of Elec. Engin., University
of Toronto, Canada, Nov.1985. Thesis
Title: Communication Performance in Multiple-bus Systems. B.Sc., Dept. of Computer Science, Huazhong University of Science and
Technology, People's Republic of China, Feb. 1982. Ranked First in the
graduating class. |
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AWARDS AND
HONORS |
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á IEEE
Fellow for contributions to computer
memory and storage systems. á EMC Endowed Visiting Chair Professor, Tsinghua University,
China, 2008. á Outstanding Intellectual Property Award, University of
Rhode Island. 2008 á Aurelio Lucci Faculty Excellence
Award for Outstanding Entrepreneurship, URI, 2007; á Outstanding Intellectual Property Award, University of
Rhode Island. 2007 á Outstanding Intellectual Property Award, University of
Rhode Island. 2005 á
Albert E. Carlotti Faculty
Excellence Award, College of Engineering, URI, 2005. á ÒYellow Crane Friendship AwardÓ for Outstanding
work on scholar activities and technology transfers, Wuhan, China,
Sept. 2002. á Cover story on International Talent Magazine June 2002. á Keynote Speech at 2002 Shen Zhen
HI-TECH Fair, Oct. 2002. á On the National News of China, People's Daily (overseas
edition), 2002 á Outstanding Intellectual Property Award, University of
Rhode Island. 2001 á 10 Best HUST alumni overseas, 2000 á ÒA novel cache on data storageÓ, A
news article on Horizons, Spring 1999. á Distinguished Engineering Professor, College of Engineering, URI, since Jan. 1998. á Listed in ÒWho Is Who Among Asian-Americans,Ó 1993 and ÒWho
Is Who in America,Ó 1994. á Aurelio Lucci Faculty Excellence
Award, for excellence in teaching, research and services, URI, 1993 á Outstanding Young Man of America, 1992 á NSF (National Science
Foundation) Research Initiation Award, RIA Award 1989 |
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US PATENTS
AND TECHNOLOGY TRANSFERS Note: 7 of the following patents have resulted in license
income to URI for over hundreds of thousands of dollars. 1.
ÒPrime-Mapped
Cache----A new cache memory system for vector processings,Ó US Patent No. 5,379,39. 2.
ÒDisk
Caching Disk---A new architecture for high performance disk I/O systems,Ó US Patent and Trademark Office, PTO No.
5,754,888. (with Yiming
Hu) 3.
ÒRAPID-Cache
(Redundant, Asymmetrically Parallel, Inexpensive Disk Cache), A new cache
structure for RAID systems,'' U.S. Patent and Trademark Office, No.
6,243,795, June 5th, 2001. (with Yiming Hu) 4.
ÒSTICS--SCSI-To-IP
Cache Storage,Ó US Patent and Trademark Office, US Patent No.
7,275,134. (with Xubin
He). 5.
ÒRORIB--A
cost effective approach for real-time, online and remote information backup,''
US Patent No. 7,177,887. (with Jian
Li). 6.
ÒCache
architecture for a processing unit providing reduced power consumption in
cache operationÓ U.S. Patent No. 7,966,452. 7.
ÒData
Recovery System and Method including a Disk Array
Architecture that Provides
Recovery of Data to Any Point of TimeÓ U.S. Patent No. 7,730,347. 8.
ÒACE:
Adaptive cache engine for storage area network including systems and methods
related theretoÓ United States Patent No. 7,370,163. Issued on May 6, 2008. (with Ming Zhang and Yinan Liu) 9.
ÒData
replication method over a limited bandwidth network by mirroring parities,Ó
U.S Patent 7,457,980. 10.
Ò`SWEET:
System and Method for Maintaining Redundant Storages Coherent using Sliding
Window of Eager Execution Transactions (SWEET),Ó US Patent No. 8,140,772. 11.
ÒHELP---Hardware
Environment for Low-overhead Profiling/Optimization and Security Functions,Ó
US Patent and Trademark Office Pending, File #7378. 12.
ÒBUCS—Bottom
Up Cache Structure for networked storage servers,Ó Patent
Application Filed with US Patent and Trademark Office on Oct. 20, 2003.
Serial Number 60/512,728. 13.
ÒCUP:
Coupling Update by Parities, A method and apparatus for maximizing data
recovery,Ó Application No. 60/940,831. 14.
ÒAPS:
Method and Apparatus for Approximate Positioning System in Personal Area
Networks Using ZigBeeÓ Application filed on March
28, 2006. (with Yan Sun, W. Xiao, and Y. Liu) 15.
ÒMethods
for detecting unfair ratings and building trust in raters in online rating
systems using signal modeling techniqueÓ Application Pending: 60/894,012, ( with Yan Sun) 16.
ÒRINGS:
Recover Information from NAND Gates StoragesÓ, US
Patent and Trademark Office, Filed in May 2008. Co-inventor: Weijun Xiao |
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PUBLICATIONS
REFERENCED
CONFERENCE PAPERS
1.
Jin Ren and Qing Yang ÓI-CASH: Intelligently Coupled Array of SSD and HDDÓ in The
17th IEEE International Symposium on High Performance Computer Architecture,
2011 (HPCA'11), San Antonio, TX, Feb 2011.
2.
Fan
Zhang, Will DiSanto, Jin Ren,
Zhi Dou, Qing Yang, and He Huang, ÓA Novel CPS System for Evaluating a
Neural-Machine Interface for Artificial LegsÓ ACM/IEEE Second
International Conference on Cyber-Physical Systems, Chicago, April 12 - 14,
2011.
3.
Jin Ren and Qing Yang A New Buffer Cache Design Exploiting both Temporal and Content
Localities The 30th International Conference on Distributed
Computing Systems, ICDCS 2010. Genoa, Italy, June 21-25, 2010.
4.
Jiguang Wan, Jibin Wang, Qing Yang, and Changsheng Xie, ÓS2-RAID: A New RAID Architecture for Fast
Data RecoveryÓ Proceedings of 26th IEEE Symposium on Massive
Storage Systems and Technologies, Lake Tahoe, Incline Village, Nevada,
May 3-7, 2010
5.
He
Huang, Yan (Lindsay) Sun, Qing Yang, Fan Zhang, Xiaorong
Zhang, Yuhong Liu, Jin Ren,
Fabian Sierra. ÓIntegrating
Neuromuscular and Cyber Systems for Neural Control of Artificial LegsÓ ACM/IEEE
International Conference on Cyber-Physical Systems Stockholm, Sweden.
April, 2010
6.
Qing
Yang ÓSecure and Efficient Data
Replay in Distributed eHealthcare Information SystemÓ, International
Conference on Information Society (i-Society
2010) June 28-30, 2010, London, UK.
7.
Yang,
Y., Sun, Y. L., Kay, S., and Yang, Q. 2009. Defending online reputation systems
against collaborative unfair raters through signal modeling and trust. In Proceedings
of the 2009 ACM Symposium on Applied Computing (Honolulu, Hawaii). SAC
'09. ACM, New York, NY, 1308-1315. DOI= http://doi.acm.org/10.1145/1529282.1529575
8.
Weijun Xiao and Qing Yang, ÓA Case for Continuous Data Protection at Block Level in Disk Array
StoragesÓ Ó IEEE Transactions on Parallel and Distributed
Systems, Volume 20, Issue 6 (June 2009), Pages 898-911.
9.
Weijun Xiao, Qing Yang, J. Ren, C. Xie, and H. Li, ÓDesign and Analysis of Block Level Snapshots for Data Protection and
RecoveryÓ IEEE Trans. Comput. 58, 12
(Dec. 2009), 1615-1625. DOI= http://dx.doi.org/10.1109/TC.2009.107
10.
Weijun Xiao and Qing Yang, ÒCan We Really Recover Data If Storage
Subsystem Fails?Ó The 28th International Conference on Distributed
Computing Systems, Beijing, China, 2008.
(ICDCS'08).
11.
X. Li,
Changsheng Xie, and Qing Yang,
ÒOptimal Implementation of Continuous Data Protection (CDP) in Linux Kernel,Ó Proc.
Of IEEE IntÕl Conference on Networking, Architecture, and Storage, Chongqing,
China, June 2008.
12.
Yafei Yang, Yan Lindsay Sun, Jin Ren,
and Qing Yang, ÒBuilding Trust in Online Rating Systems Through Signal
Modeling,Ó International Workshop
on Trust and Reputation Management in Massively Distributed Computing Systems,
June 25-29, 2007, in conjunction with ICDCS 2007
13.
Qing
Yang, Weijun Xiao, and Jin Ren , ÓTRAP-Array: A
Disk Array Architecture Providing Timely Recovery to Any Point-in -timeÓ in The 33rd Annual International Symposium on Computer
Architecture, 2006 (ISCA'06).
14.
Qing
Yang, Weijun Xiao, and Jin Ren ,ÓPRINS: Optimizing
Performance of Reliable Internet StoragesÓ The 26th International Conference on Distributed Computing
Systems, Lisbon, Portugal, 2006. (ICDCS'06).
15.
W.
Xiao, Y. Liu, Qing Yang, J. Ren, and C. Xie. ÒImplementation and Performance Evaluation of Two
Snapshot Methods on iSCSI Target StoragesÓ in NASA/IEEE 14th Conf. on Mass Storage Systems and
Technologies, College Park, Maryland, May 2006
16.
Qing
Yang ÒOn Performance of Parallel iSCSI
Protocol for Networked Storage SystemsÓ in IEEE 20th Int'l Conf on Advanced Information Networking and Applications,
Vienna, Austria, April 2006.
17.
Weijun Xiao; Yan Sun; Yinan Liu; Qing
Yang, ÒTEA: Transmission Error Approximation for Distance Estimation between
Two Zigbee DevicesÓ NAS (Networking, Architecture,
and Storage) 2006.
18.
Ming
Zhang and Qing Yang, ÒBUCS - A Bottom-Up Cache Structure for Networked
Storage ServersÓ, International Conference on Parallel Processing., Montreal, Canada, Aug, 2004, pp.310-317.
19.
Ming
Zhang, Yinan Liu, and Qing Yang, ÒCost-Effective
Remote Mirroring Using the iSCSI ProtocolÓ, 21st IEEE
Conference on Mass Storage Systems and Technologies, April, 2004, pp.385-398.
20.
Ming
Zhang, Qing Yang, and Xubin He, ÒSPEK: A Storage
Performance Evaluation Kernel Module for Block Level Storage SystemsÓ, in Proceedings
of 11th IEEE/ACM
International Symposium on Modeling, Analysis, and Simulation of Computer and
Telecommunication Systems (MASCOTS), Orlando, October 12-15, 2003.
21.
Ming
Zhang, Xubin He, and Qing Yang, ÒA Unified,
Low-overhead Framework to Support Continuous Profiling and OptimizationÓ, Proc.
Of IEEE IPCCC 2003, Apr, 2003.
22.
Ming
Zhang and Qing Yang, ÓEvaluating
Availability of Networked Storages Using Commercial WorkloadÓ, presented at Sixth
Workshop on Computer Architecture Evaluation using Commercial Workloads
(CAECW), Feb, 2003.
23.
Ming
Zhang and Qing Yang, ÒN-SPEK: A Performability Benchmark
Tool for Networked Storage SystemsÓ, to be presented at Workshop
on Parallel I/O in Cluster Computing and Computational Grids., 12-15
May 2003, Toshi Center Hotel, Tokyo, JAPAN
24.
Xubin He, Qing Yang, and Ming Zhang, ÓA Caching Strategy to Improve iSCSI
Performance,Ó in Proc. of IEEE Annual Conference on Local
Computer Networks, Nov. 6-8,2002.
25.
Xubin He, Qing Yang, and Ming Zhang, ÓIntroducing SCSI-To-IP Cache for Storage Area NetworksÓ, IEEE
International conference on Parallel Processing (ICPP'2002), August 2002,
pp. 203-210
26.
Ming
Zhang, Xubin He, and Qing Yang, ÒImplementation and
Performance Evaluation of RAPID-Cache under Linux,Ó Proc. of the
International Conference on Parallel and Distributed Processing Techniques and
Applications (PDPTA'2002), June 2002.
27.
Ming
Zhang and Xubin He, ÒA Unified, Low-overhead
Framework to Support Continuous Profiling and OptimizationÓ, to appear in Proceedings
of 22nd IEEE International Performance Computing and Communications Conference
(IPCCCÕ2003),Phoenix, Arizona, April 2003.
28.
Xubin He, Ming Zhang, and Qing Yang, ÓDRALIC: A Peer-to-Peer Storage ArchitectureÓ Proceedings
of the International Conference on Parallel and Distributed Processing
Techniques and Applications (PDPTA'2001), Volume II, June 2001, pp.
908-913.
29.
Xubin He and Qing Yang, ÓCharacterizing the Home PagesÓ Proceedings of the 2nd
International Conference on Internet Computing (ICÕ2001), June 2001, pp.
976-982.
30.
Xubin He and Qing Yang, ÓVC-RAID: A Large Virtual NVRAM Cache for Software Do-it-yourself RAIDÓ Proceedings
of the International Symposium on Information Systems and Engineering (ISE'2001),
June 2001, pp.334-340.
31.
Xubin He and Qing Yang, ÓPerformance evaluation of distributed webservers under commercial
workloadÓ in Proceedings of Internet Conference'2000, Las
Vegas
32.
Xubin He and Qing Yang, ÓA DCD Filter Driver for Windows NT 4Ó Proceedings of the
12th International Conference on Computer Applications in Industry and
Engineering (CAINE-99), Atlanta, Georgia, USA, Nov.
4-6,1999.
33.
Yiming Hu, Ashwini Nanda and Qing
Yang, ÓMeasurement, Analysis and
Performance Improvement of the Apache Web ServerÓ, in the 18th
IEEE International Performance, Computing and Communications Conference
(IPCCC'99), Phoenix/Scottsdale,Arizona,
February 1999.
34.
T.
Nightingale, Y. Hu, and Qing Yang, ÒDesign and Implementation of a DCD Device
Driver for UnixÓ, in Proceedings of the 1999 USENIX Annual Technical
Conference, Monterey, Califoria, June 1999.
35.
Y. Hu,
Q. Yang, and T. Nightingale, ÒRAPID-Cache --- A Reliable and Inexpensive Write
Cache for Disk I/O SystemsÓ, in the 5th International Symposium on High
Performance Computer Architecture (HPCA-5). Orlando, Florida.
Jan. 1999.
36.
Y. Hu
and Q. Yang, ÓDCD---Disk Caching
Disk: A New Approach for Boosting I/O Performance,Ó 23rd
Annual International Symposium on Computer Architecture, Philadelphia PA May,
1996.
37.
H.
Wang, T. Sun, and Q. Yang, ÓCaching
Address Tags: A technique to reduce chip area cost for on-chip caches,Ó 22nd
Annual International Symposium on Computer Architecture,Santa Margherita Ligure, Italy,
June, 1995.
38.
Q.
Yang and Liping W. Yang, ÓA novel cache design for vector processing,Ó Proc. of
19th Int'l Symp. on Computer
Architecture, May 1992, pp. 362-371.
39.
Li
Yang, X. Pei, and Qing Yang ÒPerformance Analysis of A new Disk Architecture as
A Netserver for NFS Network SystemsÓ, IntÕl
Conference on Computer Applications in Industry and Engineering (CAINE-96),
Dec. 1996.
40.
T. Sun
and Q. Yang, ÒEvaluating cache performance for vector computers,Ó In Proc.
IntÕl Conf. on Parallel and Distributed
Computing, Oct. 1994
41.
Chenyi Hu, Baker Kearfott, Joe Sheldon and Qing Yang, ÒSolving nonlinear
systems on vector supercomputers,Ó In Proc. Int'l Conf. on
Parallel and Distributed Computing, Oct. 1994.
42.
Sibabrata Ray, Hong Jiang and Qing Yang, ÒA New Approach To Network
Latency Reduction of Multiprocessors by Data Migration in The Absence of Cache
Coherence MechanismsÓ In Proc. ISCA Int'l Conf.
on Parallel and Distributed Computing, Oct. 1994.
43.
N. Annupindi, M. An, J. W. Cooley and Qing Yang, ÒA new and efficient
FFT algorithm for distributed memory systems,Ó in Proceedings of Internation Conference on Parallel and Distributed Systems, Dec.
1994, Taiwan
44.
T. Sun
and Q. Yang, ÒA comparison of cached and uncached vector computers,Ó in Proceedings of IEEE
1994 IntÕl Conf. on Parallel and Distributed Systems, Oct. 1994.
45.
Tao
Yang, Shengbin Hu and Qing Yang, ÓA closed form formula for queueing delays in diskarrays ,Ó Proceedings of 94' Int'l Conf. on
Parallel Processing, Aug. 1994.
46.
Q.
Yang and S. Adina, ÓA one's complement
cache,Ó Proceedings of 94' Int'l Conf. on Parallel Processing, Aug.
1994.
47.
H.
Wang and Q. Yang, ÒOn fault tolerant computation of orthogonal transforms on
hypercube multiprocessors,Ó In Proc. of 21th Int'l Conf. on Parallel
Processing, Vol. 1, Aug. 1992.
48.
Q.
Yang, ÒEffects of arbitration protocols on the performance of multiple-bus
multiprocessors,Ó In Proc. of 20th Int'l Conf. on Parallel Processing, Vol. 1,
1991.
49.
H.
Wang and Q. Yang, ÒA Prime-Cube graph approach for processor allocation in
hypercube multiprocessors,Ó In Proc. of 20th Int'l Conf. on Parallel
Processing, Vol. 1, pp. 25-32, 1991
50.
Qing
Yang and X. Qian, ÒLoad balancing on distributed
multiprocessor architectures with LALÓ, in Proc. on 11th Int,l Conf. on Distributed
Computing Systems, May 1991, pp. 402-409.
51.
C. Hu,
M. Bayoumi, B. Kearfott and
Q. Yang, ÒA parallelized algorithm for the preconditioned
interval Newton method,Ó Proc. 5th SIAM Conf. on Parallel
Processing, March, 1991
52.
Q.
Yang, G. Thangadurai
and L. N. Bhuyan, ÒAn adaptive cache coherence scheme
for hierarchical shared-memory multiprocessors,Ó IEEE Symp. on Parallel Processing,
Dec. 1990.
53.
Qing
Yang and R. Ravi, ÒDesign and analysis of
multiple-bus arbiters with different priority schemesÓ, in Proc. of
PARBASE-90--Int. Conf. on Database, Parallel Architectures, and
Their Applications, pp 238-247 March,
1990
54.
Q.
Yang, ÒOn performance improvement of cache coherence protocols for hierarchical
multiprocessors,Ó ISMM Int'l Conf. on Parallel
and Distributed Computing, and Systems, Oct. 1990.
55.
Qing
Yang, ÒPerformance analysis of a cache coherent multiprocessor based on
hierarchical busesÓ, in Proc. of PARBASE-90--Int. Conf. on Database,
Parallel Architectures, and Their Applications, pp
248-257 March, 1990.
56.
Q.
Yang and L.N. Bhuyan,
ÒA queueing network model for cache coherence
protocol on asynchronous multiple-bus multiprocessors,Ó in 88'Int,l
Conf. on Parallel Processing, pp. 130-137, 1988.
57.
Q.
Yang, L.N. Bhuyan,
and R. Pavaskar, ÒPerformance analysis of packet
switched multiple-bus multiprocessor systems,Ó in Proceedings of Eighth
Real-Time System Symposium, Dec. 1987, pp. 170-178.
58.
Q.
Yang and L.N. Bhuyan, ÒDesign and analysis of
decentralized multiple-bus multiprocessor,Ó in Proceedings of 87'Int'l
Conf. on Parallel Processing, Aug. 1987, pp. 889-892
59.
Q.
Yang, D. Ghosal and L.N. Bhuyan,
ÒAnalysis of Multiple Token-ring and Multiple Slotted-ring Networks,'' IEEE
Proceedings Computer Networking Symposium, Washington D.C., Nov.
1986, pp 79-86.
60.
Q.
Yang, D. Ghosal and L.N. Bhuyan,
ÒDesign and analysis of multiple-ring networks for distributed processing,Ó In TR 86-3-1, CACS, USL, 1986.
61.
Qing
Yang, D. Ghosal, and S. K. Tripathi,
ÒPerformance study of two protocols for data/voice intergration
on ring networks,Ó UMIACS-TR-90-46, Univ. of Maryland,
1990.
62.
Yiming Hu, Ashwini Nanda and Qing
Yang, ÓProfiling and performance enhancement of Appache
web servers,Ó Tech. Report, URI
JOURNAL PAPERS
63.
Zhang, X.; Liu, Y.;
Zhang, F.;
Ren, J.; Sun, Y.;
Yang, Q.;
Huang, H.;
On Design and Implementation of Neural-Machine Interface for Artificial Legs,
in: Industrial
Informatics, IEEE Transactions on, Digital Object Identifier: 10.1109/TII.2011.2166770
Date of Publication: 06 September 2011.
64.
J.
Yang, Q. Cao, X. Li, C. Xie, and Q. Yang ÒST-CDP:
Snapshots in TRAP for Continuous Data Protection,Ó IEEE Trans. On Computes, http://doi.ieeecomputersociety.org/10.1109/TC.2011.150
65.
Jin Ren and Qing Yang, ÒBLUVS: A Block Level Unlimited
Versioning System,Ó Submitted to IEEE Transaction on Computers.
66.
Weijun Xiao, Qing Yang, Jin Ren, Changsheng Xie, and Huaiyang Li, ÒDesign and Analysis of Block Level Snapshots
for Data Protection and Recovery,Ó IEEE
Transaction on Computer, 58, 12 (Dec. 2009), 1615-1625..
67.
Weijun Xiao, Jin Ren, and Qing Yang, ÒA
Case for Continuous Data Protection at Block Level in Disk Array Storages,Ó IEEE Transaction on Parallel and
Distributed Systems, Volume 20, Issue 6 (June 2009), Pages 898-911.
68.
Weijun Xiao, Yan Sun, Yinan Liu, and
Qing Yang, ÒTEA: Transmission Error Approximation for distance estimation
between two Zigbee devices,Ó Int. J. High
Performance Computing and Networking, 2008, to appear.
69.
Xubin He, Ming Zhang, and Qing Yang, ÒSPEK: A storage performance
evaluation kernel module for block level storage systems under faulty
conditionsÓ IEEE Transaction on Dependable and Secture
Computing ,
Vol. 2, No. 2, April-June 2005, pp. 138-149.
70.
Xubin He, Ming Zhang, and Qing Yang, ÓSTICS: SCSI-To-IP Cache for Storage Area NetworksÓ, Journal
of Parallel and Distributed Computing , vol. 64, No. 9, pp. 1069-1085,
September 2004.
71.
Scott
Lloyd, Jian Li, Joan Peckham,
and Qing Yang, ÒRORIB, An economic and efficient solution for Real-time,
Online, Remote Information Backup,Ó in Journal of Database Management,
JDM S00-294, Vol. 14, No. 3, July-Sept. 2003, pp. 56-73.
72.
Y. Hu, T. Nightingale and Q. Yang, ÓRAPID-Cache --- A Reliable and Inexpensive
Write Cache for High Performance Storage SystemsÓ, IEEE
Transactions on Parallel and Distributed Systems, Vol. 13, No. 3.
March 2002, pp.290-307.
73.
Xubin He and Qing Yang ÒPerformance Evaluation of Distributed Web
Server Architectures under E-Commerce WorkloadsÓ Submitted to Journal
of Parallel and Distributed Computing.
74.
Xubin He, Ming Zhang, and Qing Yang, ÒSTICS: SCSI-To-IP Cache for
Storage Area Networks,Ó Submitted to IEEE Transactions on Parallel and
Distributed Systems.
75.
Yiming Hu, Ashwini Nanda and Qing
Yang, ÓMeasurement, Analysis and
Performance Improvement of the Apache Web ServerÓ, International
Journal of Computers and Their Applications, Vol. 8, No. 4, Dec.
2001.
76.
Xubin He and Qing Yang ÓOn Design and Implementation of a Large Virtual NVRAM Cache for Software
RAIDÓ, in
Special Issue of Calculateurs Parallel Journal on
Parallel I/O for Cluster Computing, 2002 spring.
77.
Y. Hu
and Q. Yang, Ó A New Hierarchical
Disk ArchitectureÓ, IEEE Micro, Vol. 18, No. 6, Nov/Dec. 1998.
78.
T. Sun
and Q. Yang, ÓA comparative
analysis of cache memories for vector processing,Ó in IEEE
Trans. on Computers, Vol. 48, No.3 March 1999, pp. 331-344.
79.
Li
Yang, X. Pei, and Qing Yang ÒPerformance Analysis of A new Disk Architecture as
A Netserver for NFS Network SystemsÓ, in Int'l
Journal on Computers and Their Applications, Vol. 6, No. 3, Sept. 1999, pp.
159-165.
80.
H.
Wang, T. Sun, and Q. Yang, ÓMinimizing
area cost of on-chip cache memories by caching address tagsÓ, In
IEEE Trans. on Computers, Vol. 46, No. 11. Nov. 1997, pp. 1187-1201.
81.
Q.
Yang, Sridah Adina and T. Sun, ÓDesigning on-chip cache using complement
numbersÓ, in Journal of Parallel and Distributed Computing,
Academic Press. Vol. 48, pp. 143-164, 1998
82.
Qing
Yang and Tao Yang, ÓA memory
interference model for regularly patterned multiple stream vector accesses,''IEEE
Transactions on Parallel and Distributed Systems, Vol. 6, No. 5, pp.
520-530, May 1995.
83.
Qing
Yang, ÒIntroducing a new cache design into vector computers,'' in IEEE
Transactions on Computers, Vol. 42, No. 12, Dec. 1993, pp.
1411-1424. The Prime-mapped Cache
84.
Nagesh Anupindi, Qing Yang and M. An, ÒTensor
Product Formulations of Data Partition and Migration for Matrix Transpose and
FFT AlgorithmsÓ, in Journal of
Parallel and Distributed Computing.
85.
S.
Ray, H. Jiang and Q. Yang, ÒA Compiler-directed Approach to Network Latency
Reduction in Distributed Shared Memory MultiprocessorsÓ, Journal of
Parallel and Distributed Computing, Special Issue on Compilation Techniques
for Distributed Memory Systems
86.
C-M
Chung, D-A Chiang and Qing Yang ÓA comparative analysis of different arbitration protocols for
multiple-bus multiprocessorsÓ International Journal of Computer Science
and Enigeering. Vol. 11, No. 3,May 1996.
87.
C. Hu,
A. Frolov, B. Kearfott, and
Q. Yang, ÒA General Sparse Interval Linear Solver and its Parallelization for
the Interval Newton's MethodsÓ, International Journal on Reliable
Computing, No. 3, 1995.
88.
C. Hu,
J. Sheldon, B. Kearfott, and Q. Yang, Optimizing
INTBIS on the CRAY Y-MP, International Journal on Reliable Computing,
No. 3, 1995.
89.
Q. Gan, Q. Yang and C. Y. Hu, ÒParallel all-row preconditioned
interval linear solver for nonlinear equations on multiprocessors,'' Parallel
Computing, (20) 1994.
90.
Qing
Yang, ÒGuest Editor's Introduction,Ó in IEEE
Computer Society Tech. Comm. on Comp. Arch. Newsletter, Special Issue on
Cache Memories for Supercomputers, Oct. 1993.
91.
Qing
Yang, ÒPerformance of cache memories for vector computers,'' in Journal
of Parallel and Distributed Computing,
Special Issue on Performance of Supercomputers. 19 pp.163-178, 1993.
92.
Xiaoshu Qian and Qing Yang, ÒAn
analytical model for load balancing on symmetric multiprocessor systems,''
in Journal of Parallel and Distributed Computing, Vol. 20, 1994,
pp. 198-211.
93.
Qing
Yang and H. Wang, ÒA graph approach to
minimizing processor fragmentations on hypercube multiprocessorsÓ, in IEEE
Transactions on Parallel and Distributed Systems, Oct. 1993, pp. 1165-1171.
94.
Qing
Yang, D. Ghosal, and S. K. Tripathi,
ÒPerformance study of two protocols for voice/data integration on ring networksÓ,
in Computer Networks and ISDN Vol. 23, 1992, pp. 267-285.
95.
Qing
Yang, G. Thangadurai
and L. N. Bhuyan, ÒDesign of a dynamic cache
coherence scheme for large scale multiprocessorsÓ, in IEEE Transactions
on Parallel and Distributed Systems, Vol. 3, No. 3, May 1992, pp.281-293.
96.
Qing
Yang and L. N. Bhuyan, ÒAnalysis of Packet-Switched
Multiple-Bus Multiprocessor Systems,'' in IEEE Transactions on
Computers, Vol. 30, No. 3, March 1991, pp. 352-357.
97.
Qing
Yang and L. N. Bhuyan, ÒPerformance of Multiple-Bus
Interconnections for Multiprocessors,'' in Journal of Parallel and
Distributed Computing, 8. pp. 267-273 (1990).
98.
Qing
Yang, L. N. Bhuyan and B. Liu, ÒAnalysis and
Comparison of Cache Coherence Protocols for a Packet-Switched Multiprocessor,''
in IEEE Transactions on Computers,
Special Issue on Distributed Computer Systems, Aug. 1989, pp
1143-1153.
99.
L. N. Bhuyan, D. Ghosal, and Qing Yang,
ÒApproximate Analysis of Single and Multiple-ring Networks,'' in IEEE Transactions on Computers,
July 1989, pp 1027-1040.
100.
L. N. Bhuyan, Qing Yang and D. P. Agrawal,
ÒPerformance of Multiprocessor Interconnection NetworksÓ, IEEE
Computer, vol. 22, No. 2, pp.25-37, Feb. 1989.
101.
Qing
Yang and S. G. Zaky, ÒCommunication performance in
multiple-bus systemsÓ, IEEE Transactions on Computers, Vol. 32, No.
7, pp. 848-853, July 1988.
BOOK
CHAPTERS
102.
Scott
J. Lloyd, Joan Peckham, Jian
Li and Qing (Ken) Yang, ÒSimultaneous Database Backup Using TCP/IP and
Specialized Network Interface Card,Ó Chapter IV, Advanced Topics in Database
Research, Vol. 4, IGP: Idea Group Publishing
103.
Xubin He, Qing Yang, ÒA Large Virtual NVRAM Cache for Software
RAID,Ó Parallel I/O for Cluster Computing (Chapter 7),
Editors: Christophe CƒRIN and Hai JIN, 2002
September.
104.
Chapter
15: RAPID-Cache --- A Reliable and Inexpensive Write Cache for Disk I/O Systems , in Hai Jin, Toni Cortes,
and Rajkumar Buyya
(editors), High Performance Mass Storage and Parallel I/O: Technologies and
Applications, IEEE & Wiley Press, ISBN 0-471-20809-4, New York, USA, 2001.
105.
L. N. Bhuyan, D. Ghosal, Q.
Yang ÓApproximate analysis of single and multiple ring networksÓ,
in Fiber Optic Local Area Networks, Ed: Eric G. Rawson, SPIE Press,
1990.
106.
Qing
Yang, ÒPerformance analysis of a cache coherent multiprocessor based on
hierarchical busesÓ, in Parallel Architectures, Ed: N. Rishe, S. Navathe and D. Tal,
IEEE Computer Society Press, 1990.
107.
Qing
Yang and R. Ravi, ÒDesign and analysis of
multiple-bus arbiters with different priority schemesÓ, in Parallel
Architectures, Ed: N. Rishe, S. Navathe and D. Tal, IEEE Computer Society Press, 1990.
108.
Qing
Yang, ÒA conflict-free cache design Ò, in Practical Aspects of Parallel
Computing, Ed: L. Tao, 1994.
109.
Qing
Yang, ÒProcessor allocation in multicomputers,Ó
in Practical Aspects of Parallel Computing, Ed: L. Tao, 1994.
110.
Qing
Yang, L. N. Bhuyan and B. Liu, ÒAnalysis and
Comparison of Cache Coherence Protocols for a Packet-Switched Multiprocessor,''
in Readings on Performance
Evaluation for Computer Architects, 1994 Editor: C. M. Krishna
|
RESEARCH GRANTS AND CONTRACTS |
Qing Yang, ÒIntroducing I-CASH, A New Disk IO ArchitectureÓ, THE NATIONAL SCIENCE FOUNDATION, CCF - SOFTWARE & HARDWARE FOUNDATION CCF-1017177, Aug. 1 2010 - July 31, 2014.
2.
ÒTowards
Neural-controlled Artificial Legs using High-Performance Embedded ComputersÓ,
$1.38Million, NSF-CISE Cyber Physical System Program, September 2009-Sept. 2013.
with He Huang and Yan Sun
3.
ÒDesign
of a Real-Time Fusion-based Neural Controlled Artificial LegsÓ National
Institutes of Health, R21, with He Huang .
4.
Qing
Yang, ÒUnderstanding, Analyzing, and Designing Storage Subsystem Architectures
for Maximum Data Recoverability,Ó National Science Foundation, Aug. 1, 2008 to
Aug. 1, 2011. Principal Investigator, 1 of 1.
5.
Qing
Yang, ÒValidation and Evaluation of a New Data Replication Technology,Ó
National Science Foundation, SGER Grant, Feb. 2006 to July 2007.
6.
Qing
Yang and B. Nassersharif , ÒReshaping computer engineering education and training
for the information era,Ó NASA NNX06AB10G, Sept. 2006-Sept 2008. (PI)
7.
Qing
Yang, ÒDesign and Analysis of Data Processing and Storage in Image Processing
Systems,Ó NI, Aug. 1, 2007 to Sept. 2008. Principal Investigator, 1 of 1.
8.
Qing
Yang, ÒHELP - A Profiling Tool for Disk I/O and Networked Storage,Ó National
Science Foundation, CCR-0312613, ITR grant, Aug. 2003 to July 2006. Principal
Investigator 1 of 1.
9.
Qing
Yang, ÒBoosting Webserver Performance Using DRALIC----Distributed RAID and
Location Independence CachingÓ, National Science Foundation, 3 years, Sept.
2000 to Sept. 2003, Principal Investigator 1 of 1.
10.
Qing
Yang, ÒA New Spectrum of Hierarchical Storage Architectures for High
Performance Disk I/Os.Ó National Science Foundation,
Grant No. MIP-9714370, (PI 1 of 1).
11.
Qing
Yang, ÒExploring desgin space for high performance
low cost memory hiearchy,Ó National Science
Foundation Grant No. MIP-9505601, Aug. 1995-Aug. 1998. Principal Investigator
(1 of 1).
12.
Qing
Yang, ÒIntroducing a new cache design into vector computers,Ó National Science
Foundation Grant No. MIP-9208041, three years from June 1992 to Dec. 1995,
Principal Investigator (1 of 1).
13.
Qing
Yang, ÒDesign and analysis of high performance cache-coherent multiprocessors
based on shared busesÓ, National Science Foundation grant CCR-8909672, Aug.
1989 - July 1992, Principal Investigator (Research Initiation Award).
14.
ÒEquipment
for diverse computer architecture researchÓ National Science Foundation, Jan.
1998-Jan. 1999, co-PI with Gus Uht,
Don Tufts, J-C. Lo.
15.
Qing
Yang ÒEffects of disk accesses on the performance of computer systemsÓ,NSF, November 1996 - June
1997.
16.
ÒEvaluating
Web Server performance on multiprocessorsÓ, IBM December 1996 --December 1997,
17.
Qing
Yang ÒPrototyping DCDÓ, URI Research Council.
18.
Qing
Yang ÒResearch Experience for UndergraduatesÓ, National Science Foundation,
Aug. 1996 - July 1998. Principal Investigator.
19.
Qing Yang,ÓOptimization of Parallel Computing on Cache-Coherent
MultiprocessorÓ, Research Council Grant for July 1991-July 1992, Principal
Investigator
20.
Travel
grant from National Science Foundation for to present a paper at ISCA92
in Australia.
21.
Qing
Yang, ÒInnovative architecture designs for supercomputers,Ó URI Research
Council for Aug. 1992 - Dec. 1992.,
Principal Investigator
22.
Qing
Yang, ÒUpgrading Computer Organization Lab,Ó Intel Corp. April
1993, Principal Investigator.
23.
Qing
Yang, United Nation Industrial Development Organization, UNIDO, Training In ternational scholars May
1993
24.
Qing
Yang, United Nation Industrial Development Organization, UNIDO, Training In ternational scholars May
1994.
25.
Qing
Yang, ÒComputer Applications in Industry,Ó Xifeng
Industrial Inc.
|
gRADUATE
STUDENTS ADVISED |
PH.D. GRADUATES
1.
Jin Ren, Ph.D, Jan. 2011, Senior software architect, VeloBit,
Inc.
2.
Weijun Xiao, Ph.D,May 2009. Named as Computing Innovation Fellow by the
Computing Community Consortium (CCC) and the Computing Research Association
(CRA) funded by NSF
3.
Ming
Zhang, May, 2005, Senior Research Architect, Tandberg
Co.
4.
Xubin Ben He, Ph.D, July 2002, Tenured Assoc. Professor,
Department of Electrical and Computer
Engineering, Tennessee Technological University
5.
Yiming Hu, Ph.D, Jan.
1999, Tenured Assoc. Prof. U. of Cincinnati, winner of NSF 2000Õ Career Award.
6.
Hong Wang, Ph.D, Jan. 1996,
Director of Intel Microprocessor Research Lab. Senior Principal Researcher (Sr.
Principal Engineer), Intel Co. Winner of 1999 Intel Accomplishment Award.
7.
Nagesh Anupindi, 1994, Senior Scientist,
Aware Inc., Cambridge, MA
8.
Tong
Sun, 1996, Principle Scientist, Xerox Co., Rochester, New York
MASTER GRADUATES
Kurt
R. Almquist, George Thangadurai,
Ravi Raja, Qi Gan, V. Geetha,
J. Huang, Adina Sridha, Kevin Yee, Gregory Bussiere, Jie Lu, Xiaosong He, Brian Capoccia, John
Didier, Jian Li, Yaodong
Hu.
|
pROFESSIONAL
ACTIVITIES |
á IEEE Fellow
á General Chair, International Symposium on Computer
Architecture, 2011, (the premier conference in the field)
á Co-Founder and Chair for IEEE International Conference on
Networking, Architecture and Storages. Successfully held for 5 consecutive
years.
á Program Committee Member: International Symposium on High
Performance Computer Architecture, 2006
á Program Committee Member: IEEE International Symposium on
Workload Characterization, 2005,
á Program Committee Member: International Symposium on
Computer Architecture and High Performance Computing, 2005, SBAC-PAD05
á Program Committee Member: IFIP International Conference on
Network and Parallel Computing 2005
á Founder and Workshop Chair, International Workshop on
Storage Network Architecture and Parallel I/Os,
SNAPIÕ05. SNAPI has been successfully held annually for 4 years.
á Served in two NSF Panels in 2005.
á Associate Editor, IEEE Transaction on Parallel and Dsitributed Systems, 1999-2001.
á Membership Chair, IEEE TCCA, 2002-present.
á Distinguished Speaker of IEEE Computer Society, 1996-1999.
á Program Committee Chairman, IntÕl Conf. On Computer
Applications in Industry and Engineering, Nov. 1999
á Program Committee Chairman, International Workshop on High
Performance Computing, Beijing China, 1995
á Publication Chairman, International Symposium on High
Performance Computer Architecture 1995
á Program Committee Members of several international
conferences.
á Guest editor of several professional journals.
á Invited speaker for numerous universities and companies in
the world.
á Referees for several professional journals.
|
pERSONAL
INFORMATION |
Married with two daughters and two
sons. Love Tennis, badminton, and boating.