Welcome to IEEE TCCA Email-Monthly, May 2004:
*Palace Hotel, San Francisco, February 12-16, 2005 *Call for Papers: http://www.hpcaconf.org/hpca11 *Submission deadline: July 12, 2004, Abstract.
*Portland, OR, December 6-8th, 2004 *CALL FOR PAPERS: http://www.microarch.org/micro37 *Submission deadline: May 28th, 2004 *Submitted by: "Glenn Reinman" <reinman@CS.UCLA.EDU>
*Available at: http://www.comp-arch-letters.org/2004paps.html -Submitted by: Kevin Skadron <skadron@cs.virginia.edu>
*In conjunction with ISCA-31, on Sunday morning, June 20. *Call for Participation: www.cs.virginia.edu/~skadron/tacs/index.html *Early registration deadline: May 19th -Submitted by: Kevin Skadron <skadron@cs.virginia.edu>
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qyang@ele.uri.edu * To subscribe to this mailing list, please sign up at <http://www.computer.org/TCsignup/index.htm>
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HPCA-11 Call for Papers 11th International Symposium on High-Performance Computer Architecture
Palace Hotel, San Francisco, February 12-16, 2005 http://www.hpcaconf.org/hpca11
The International Symposium on High-Performance Computer Architecture provides a high-quality forum for scientists and engineers to present their latest research findings in this rapidly-changing field. Authors are invited to submit papers on all aspects of high-performance computer architecture. Topics of interest include, but are not limited to:
Authors should submit an abstract before Monday, July 12, 2004, 9pm PST. They should submit the full version of the paper before Monday, July 19, 2004, 9pm PST. No extensions will be granted. The full version should be a PDF file that does not exceed 6,000 words according to the instructions in http://www.hpcaconf.org/hpca11. Papers that exceed the length limit or that cannot be viewed using Adobe Acrobat Reader (version 3.0 or higher) may not be reviewed. Papers should be submitted for blind review. Please indicate whether the paper is a student paper for best student paper nominations.
Papers will be evaluated based on their novelty, fundamental insights, and potential for long-term contribution. New-idea papers are encouraged.
Submission issues should be directed to the program chair at torrellas@cs.uiuc.edu. Workshop and tutorial submissions should be directed to the workshop and tutorial chair at jared.w.stark@intel.com.
Important dates
Sponsored by the IEEE Computer Society TC on Computer Architecture.
General Chair
Justin Rattner, Intel
Program Chair
Josep Torrellas, Univ. of Illinois
Program Committee
Sarita Adve, Univ. of Illinois
David Albonesi, Univ. of Rochester
Krste Asanovic, MIT
Ricardo Bianchini, Rutgers Univ.
Angelos Bilas, Univ. of Crete
Pradip Bose, IBM
Brad Calder, Univ. of California, San Diego
John Carter, Univ. of Utah
Alok Choudhary, Northwestern Univ.
Tom Conte, North Carolina State Univ.
Jose Duato, Univ. Politecnica Valencia
Michel Dubois, Univ. of Southern California
Kemal Ebcioglu, IBM
Kourosh Gharachorloo, Google
Antonio Gonzalez, Univ. Politecnica Catalunya
Rajiv Gupta, Univ. of Arizona
Michael Huang, Univ. of Rochester
Mary Jane Irwin, Pennsylvania State Univ.
Lizy John, Univ. of Texas
David Kaeli, Northeastern Univ.
Steve Keckler, Univ. of Texas
Diana Marculescu, Carnegie Mellon Univ.
Shubu Mukherjee, Intel
Mark Oskin, Univ. of Washington
Timothy Pinkston, Univ. of Southern California
Steve Scott, Cray
Andre Seznec, IRISA/INRIA
John Shen, Intel
Anand Sivasubramaniam, Penn. State Univ.
Kevin Skadron, Univ. of Virginia
Yan Solihin, North Carolina State Univ.
James Smith, Univ. of Wisconsin
Mateo Valero, Univ. Politecnica Catalunya
T. N. Vijaykumar, Purdue Univ.
Yuanyuan Zhou, Univ. of Illinois
Industry Liaison Chairs
Konrad Lai, Intel
Sanjay Patel, Univ. of Illinois
Local Arrangements Chair
Murali Annavaram, Intel
Workshop and Tutorial Chair
Jared Stark, Intel
Publicity and Publications Chair
Christos Kozyrakis, Stanford Univ.
Finance and Registration Chair
Pradeep Dubey, Intel
Web Chair
Wei Liu, Univ. of Illinois
Steering Committee
Dharma Agrawal, Univ. of Cincinnati
Laxmi Bhuyan, Univ. of California, Riverside
Jose Duato, Univ. Politecnica Valencia
Jean-Luc Gaudiot, Univ. of California, Irvine
Yale Patt, Univ. of Texas
Francisco Tirado, Univ. Complutense Madrid
Emilio L. Zapata, Univ. of Malaga, Spain
MICRO-37 Call for Papers THE 37th ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE
Portland, OR, December 6-8th, 2004
http://www.microarch.org/micro37
Abstract & Full Paper Submission Deadline: May 28th, 2004
Papers are solicited for the 37th Annual International Symposium on Microarchitecture. Papers are being sought on all aspects of computer architecture, including (but not limited to) the following:
There is an automatic 1-week extension (June 4th, 2004) for submitting the full paper, but no extension on abstract submission. Please submit, using our website, one electronic copy of the paper in PDF format, not to exceed 22 double-spaced single-column pages and 5000 words. Author notification will be August 16th, 2004.
The 37th International Symposium on Microarchitecture will be held at the Doubletree Hotel in Portland, Oregon. MICRO is the premier forum for presenting, discussing and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. The goal of this symposium is to bring together researchers in fields related to processor architecture, compilers, and systems, for technical exchange on traditional MICRO topics as well as new emerging research areas. Historically, the MICRO community has enjoyed having close interaction between academic researchers and industrial designers; we aim to continue and emphasize this tradition at MICRO-37.
Please refer to http://www.microarch.org/micro37 for the complete call for papers and other details about the symposium.
Computer Architecture Letters announces our most recent paper, which is
publicly available at
http://www.comp-arch-letters.org/2004paps.html. We continue to seek new
submissions and remain committed to fast and accurate review. Our mean
time to decision remains one month, with an acceptance rate of
approximately 21%. For more information on submission, please see
http://www.comp-arch-letters.org
Abstract:
We introduce a new method of adaptive routing on k-ary n-cubes, Globally Adaptive Load-Balance (GAL). GAL makes global routing decisions using global information. In contrast, most previous adaptive routing algorithms make local routing decisions using local information (typically channel queue depth). GAL senses global congestion using segmented injection queues to decide the directions to route in each dimension. It further load balances the network by routing in the selected directions adaptively. Using global information, GAL achieves the performance (latency and throughput) of minimal adaptive routing on benign traffic patterns and performs as well as the best obliviously load-balanced routing algorithm (GOAL) on adversarial traffic.
TACS Call for Participation
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The First Workshop on Temperature-Aware Computer Systems (TACS) invites
participants. TACS will take place in conjunction with ISCA-31, on
Sunday morning, June 20.
**
Please note that the early registration deadline is May 19th. See
http://wwwbode.cs.tum.edu/~isca/ for details.
**
The half-day TACS program will include three technical papers, a panel on future research challenges in temperature-aware computer systems, and invited speakers. For details, see the TACS home page at http://www.cs.virginia.edu/~skadron/tacs/index.html
The goal of this workshop is to serve as a forum for exploring a broad spectrum of topics pertaining to temperature-aware computer architecture and for researchers to exchange ideas and initiate collaborations.
Tutorial on Thermal Issues for Temperature-Aware Computer Systems: Call
for Participation
---
This full-day tutorial focuses on how heat is generated and dissipated
in modern computer systems and the opportunities for computer and system
architects to contribute to thermal design. This tutorial will be held
in conjunction with ISCA-31, on Saturday, June 19.
**
Please note that the early registration deadline is May 19th. See
http://wwwbode.cs.tum.edu/~isca/ for details.
**
This tutorial is primarily intended for an audience of architecture researchers who are already moderately acquainted with issues in modeling and designing *power* aware systems, but who may have little or no familiarity with thermal issues. We also welcome the participation of those more experienced in these issues.
The tutorial will explain the way that heat is dissipated at different levels of the computer system, carefully differentiate between issues of reducing heat vs. regulating temperature, describe simple yet accurate modeling techniques that allow architects to study thermal issues, examine the variety of issues related to on-chip temperature sensing, and review recently proposed techniques for thermal management at the circuit, architecture, and system levels. The final segment of the tutorial will be a sketch of what we see as the major research questions of interest to computer architects in the next few years. Presenters include Kevin Skadron, David Brooks, Antonio Gonzalez, and Lev Finkelstein. For a detailed outline of the tutorial, see http://wwwbode.cs.tum.edu/~isca/tutorial.html#thermal