Extraction of Massive Instruction Level Parallelism
Augustus K. Uht
Dept. of Electrical Engineering
Univ. of Rhode Island
Kingston, RI 02881, USA
ACM SIGARCH Computer Architecture News, 21(2 and 3),
March and June 1993.
Our goal is to dramatically increase the performance of uniprocessors through
the exploitation of instruction level parallelism, i.e. that parallelism
which exists amongst the machine instructions of a program. Speculative
execution may help a lot, but, it is argued, both branch prediction
and eager execution are insufficient to achieve performances in speedup
factors in the tens (with respect to sequential execution), with reasonable
A new form of code execution, Disjoint Eager Execution (DEE),
is proposed which uses less hardware than pure eager execution, and has more
performance than pure branch prediction; DEE is a continuum between
branch prediction and eager execution. DEE is shown to be optimal, when
processing resources are constrained.
Branches are predicted in DEE, but the predictions should be made in parallel
in order to obtain high performance. This is not allowed, however, by the
use of the standard insrtruction stream model, the dynamic model (the
order is as indicated by the contents of the Program Counter).
The use of the static insruction stream is proposed instead. The static
instruction stream oreder is the same as the order of the code in memory,
and is independent of the execution of branches. It allows reduced branch
dependencies, as well.
It is argued that a new version, Levo, of an old machine model, CONDEL-2,
will be able to attain massive Instruction Level Parallelsim.