Inverter Layout

inverter_layout.gif (22272 bytes)

PS3 Process Notes:

  • The N-type transistor has three layers: NDiff, PWell, VT_Adjust
  • The Substrate connector for the N-type transistor has two layers: PDiff and PWell
  • The width of the active layer, where it crosses Poly #2, determines the width of the transistor.  For this example, the width should be 8.
  • A Contact layer cut must be inside an Active layer in order to make contact with the diffusion areas (In this process, the Active layer is the layer where field oxide does not grow).

 

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