Jien-Chung Lo, Ph.D.
Professor
Director, Computer Engineering Program

Department of Electrical & Computer Engineering
University of Rhode Island
Kingston, RI 02881
Fall 2008 schedule:
ELE405: Digital Computer Design ~~ Lecture: MWF 12-12:50, Kelley 103
ELE405 Laboratories: MT 2-4:45
University College Advisor for Computer Engineering ~~ M 11-1PM
Dr. Lo received his Ph.D. in Computer Engineering from University of Louisiana, Lafayette, Louisiana, in 1989. His research interests include: fault-tolerant computing, reliable logic circuit design and synthesis, and mixed-signal VLSI testing. Dr. Lo's research projects have been supported by the National Science Foundation, Office of Naval Research, Champlin Foundation, Samuel Slater Economic Partnership Grant, Cherry Semiconductor, Japan's Center for Global Partnership, and Japan Society for Promotion of Sciences.

Recent projects:

  • On-chip measurement for dynamic power management.
  • Mixed-signal testing and on-chip jitter measurement.
  • Spurious behaviour of dependable logic circuits.
  • Hardware Fault Injection using NanoTechnology.
  • Senior member of Institute of Electrical and Electronic Engineers (IEEE) Computer Society
  • Associate Editor, 2001-2005, IEEE Transactions on Computers.
  • Guest Editor, Journal of Systems Architecture, Elsevier Pub.
  • Included in WHO'S WHO IN AMERICA.
  • Included in Who's Who in Engineering Education (WWEE).
  • General Chair (2001) and Program Chair (2000) of IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.
  • General Chair of IEEE 8th North Atlantic Test Workshop at URI's Whispering Pine Conference Center, May 1999
    • Dr. Lo holds two U.S. patents and publishes extensively in IEEE journals and conferences. List of recent publications.
    Kelley Annex, Room 221 Tel: (401) 874-2996 FAX: (401) 782-6422 Email: jcl@ele.uri.edu